USC’s Information Sciences Institute (ISI), a unit of the university’s Viterbi School of Engineering, is a world leader in the research and development of advanced artificial intelligence, information processing, computing, and communications technologies. ISI’s 400 faculty, professional staff and graduate students carry out extraordinary information sciences research at three distinct locations - Marina Del Rey, CA; Arlington, VA; and Waltham, MA.

*This position is based in Arlington, VA. Remote work options are available *

The Reconfigurable Computing Group (RCG) at ISI is a leader in disrupting and advancing the fields of front-end ASIC and FPGA design, computer architecture, and EDA tools. As an applied research lab, our work spans the creation and maturation of ideas from academic conception to applied research prototypes.

RCG staff can be found:

• Researching and developing toolsets to map AI algorithms directly to hardware,
• Optimizing full scale testing of billion transistor FPGAs to minimal runtime,
• Performing experiments on the International Space Station,
• Utilizing ISI’s MOSIS service to fabricate novel computer architectures.

Our success is based on investing in our staff through a culture centered on:

• Learning and idea generation
• Transparent and constructive feedback
• Continual growth through contributing to, creating, and leading a research agenda.

We are looking for highly talented, motivated developers to perform research and development in the area of digital design and CAD tools for ASIC and FPGA hardware. This position will collaborate with a high caliber team to research and develop cutting edge solutions in reconfigurable architectures, design tools, and hardware security. Be an active member of a fast-paced Front-end Research and Development team supporting architecture definition, custom EDA tool development and realization on ASICs and FPGAs. This position will lead research, propose major innovations, collaborate with peers within the group and across ISI, publish results in top tier conferences, and contribute to or lead proposals.

Position specific JOB QUALIFICATIONS:

• PhD or MS and equivalent experience in Computer Engineering, Electrical Engineering, or Computer Science required.
• Previous publications/patents, or innovations related to CAD tool development, test and verification, computer architecture, or hardware machine learning.
• Solid understanding of CAD algorithms leveraging High-Level Languages, LLVM, or High-Level Synthesis.
• Experience with standard digital design tools (FPGAs and ASIC) such as Xilinx Vivado, Intel Quartus, Synopsys Design Compiler, , Cadence Stratus, or Open Source CAD tools. .
• Ability to handle Controlled Unclassified Information (CUI). Per U.S. government regulations, eligibility to handle CUI requires U.S. Citizenship.

   

Preferred Job Qualifications:

•  1-3 years of experiences developing and/or verifying embedded systems with FPGAs or  custom ASICs.
•  1-3 years of experience using digital logic verification and/or model checking tools such as Synopsys Formality or Cadence Conformal.
• Understanding of Machine Learning toolkits (Keras/TensorFlow/PyTorch)..

The University of Southern California values diversity and is committed to equal opportunity in employment.